1. Field of the Invention
This invention relates to a structure of wiring for a semiconductor device having a multi-layer wiring configuration and to a method of fabricating a semiconductor device having such a multi-layer wiring structure.
2. Description of the Prior Art
Since, in a semiconductor integrated circuit (or IC), numerous circuit elements such as transistors, diodes and resistors are formed in a semiconductor substrate having a limited surface area, it is usually impossible to form all the necessary wiring circuits in the same surface of the substrate. In order to provide the entire wiring circuit in the substrate, a multi-layer structure is employed in which the entire circuit is divided into two or three subcircuits that are formed in two or three wiring layers separated from each other by insulating layers. This means that the surface area of the substrate is substantially multiplied. With this multi-layer wiring structure, the terminal portions for connection with the external lead wires are provided on the uppermost surface especially on its periphery in view of bonding them with the external lead wires. FIG. 1 shows in top view an example of a semiconductor substrate having such a multi-layer wiring structure as described above. As is shown in FIG. 1, the terminal portions of the wiring provided on the top surface of a semiconductor substrate 1 respectively have portions 2 called "pads" having rather large areas for good bonding connection with external lead wires (not shown).
FIG. 2 is a cross section taken along line II--II of FIG. 1, showing the semiconductor substrate 1 with necessary circuit elements provided therein (not shown). In FIG. 2, reference numeral 3 indicates an insulating layer formed of, for example, SiO.sub.2 on the surface of the substrate 1 and numeral 4 designates a first wiring layer formed in a predetermined pattern on the insulating layer 3 and connected with circuit elements in the surface of the substrate 1 through windows (not shown) cut in the insulating layer 3. Numeral 5 indicates an insulating layer formed of SiO.sub.2, Si.sub.3 N.sub.4, glass or resin on the surface of the substrate, including the first wiring layer; 6 a second wiring layer formed in a predetermined pattern on the insulating layer 5 and connected with the first wiring layer 4 through openings 7 cut in predetermined portions of the insulating layer 5; 8 an insulating layer formed of the same material as that of the insulating layer 5 on the entire surface of the second wiring layer 6, except those portions occupied by the "pads" 2, for protecting the active surface of the substrate 1 from the atmosphere; and 9 an external metal lead connected with a pad 2 through the well-known wire bonding method. FIG. 3 shows an enlarged scale one of the pads 2 as viewed from top.
As is seen in FIG. 3, in such a multi-layer wiring structure as described above, the part A of the pad 2, except that portion thereof to which the external metal lead 9 is attached, remains exposed to the atmosphere. Accordingly, when moisture adheres to the part A, the second wiring layer 6 may be corroded at that part and, as the corrosion proceeds, the intermediate portion of the second wiring layer 6 (for example, narrow portion B) may break. In order to eliminate such a fault, it is necessary to cover the part A of the pad 2 with the insulating layer 8 and to leave only the portion for connection with the external lead wire exposed. However, it is impossible from a technical point of view to completely satisfy this requirement and moisture cannot be prevented from adhering to the pads.